Among data transfer technologies, there is provided a technology referred to as a DMA (Direct Memory Access) transfer.
In the DMA transfer, a CPU (Central Processing Unit) first sets DMA information such as a data transfer source address, a data transfer destination address, a data transfer size necessary for the transfer in a register in a DMA transfer control apparatus. Then, when the CPU instructs start of the transfer to the DMA transfer control apparatus, the DMA transfer control apparatus executes a transfer process according to the DMA information set in the register. The DMA transfer control apparatus asserts a DMA transfer completion interrupt to the CPU when the transfer of data corresponding to the transfer size set in the register is completed. When the CPU detects the DMA transfer completion interrupt, the CPU reads the information in the register of the DMA transfer control apparatus to check a result or a status of the DMA transfer.
It is not necessary to perform transfer control by the CPU during execution of the transfer process by the DMA transfer control apparatus. Consequently, the data transfer in the DMA transfer may be performed at higher speed than in a case where the data transfer is performed via the CPU. Further, a burden on the CPU may be reduced in the DMA transfer.
In the DMA transfer in general, reading of data necessary for each set size (unit amount) is performed, and subsequent writing of the data is performed. Since a timing of starting the writing is after completion of the reading, transfer efficiency is not good in a transfer to a device with a large latency.
There is provided a DMA transfer control apparatus using an AXI (Advanced eXtensible Interface) bus.
The AXI bus includes a read-only bus and a write-only bus, so that data acquisition from a data transfer source region using the read-only bus and data transfer to a data transfer destination region using the write-only bus may be executed in parallel.
The AXI bus includes a burst transfer function. The burst transfer function is a function whereby a plurality of unit amounts of read data may be obtained by a one-time read request, and a plurality of unit amounts of writes may be executed by a one-time write request.
The DMA transfer control apparatus using the AXI bus may perform transfer at high speed by using the read-only/write-only buses and the burst transfer function.